1. Field of the Invention
The invention relates to a flip-flop, and more particularly to a flip-flop applied in a pipelined analog-to-digital converter (ADC).
2. Description of the Related Art
A flip-flop is capable of providing the functions of a frequency divide-by-2 divider. FIG. 1 is a schematic diagram of a conventional frequency divide-by-2 divider based on a D flip-flop. When the conventional divider receives a clock signal CLK, it can generate an output signal CLK/2 having a half frequency of the clock signal CLK. The clock signal CLK/2 is required to have a precise 50% duty cycle for implementation. Please refer to FIG. 2, which is an internal schematic diagram of the conventional divider, where CLK_ represents an inverse signal of the clock signal CLK. Because the data transmitting path of the conventional divider includes two inverters and two switches and the conventional divider is not a differential circuit, the duty cycle of the output signal CLK/2 will not be 50% and jitter will be introduced into.